招 Senior FPGA Engineer有意可私聊,在新加坡设点或去上海都可以
Senior FPGA Engineer
JD:
1,ASIC prototyping for high-speed circuit design, work together with design team to create FPGA emulation solution/platforms definition and FPGA implementation for chipset SOC function validation;
2,Design porting from ASIC to FPGA;
3,FPGA design simulation and debugging;
4,FPGA implementation flow, synthesis, P&R, timing etc.;
5,FPGA on board debugging;
QUALIFICATION:
1, MS in EE, CS or related. 2+ years for FPGA prototyping
2, Deep knowledge on PCIe/ USB / Mipi / HDMI / DDR and other interface protocols is a big plus.
3,Knowledge of digital circuit design, and computer system architecture;
4,Familiar with Verilog/VHDL or SystemVerilog or Chisel;Knowledge of Unix platform and csh. Perl/TCL/Python programming is a plus;
5,Familiar with Xilinx or Intel(Altera) Series FPGA device structure and EDA Tools such as synplify, vivado, protocompiler, etc;
6,Good team work; strong problem sol
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CNY 60K/year?
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