Job Description　

•Fully responsible for Netlist-to-GDS physical design implementation of low power chips　

Job Requirement　

_{•Bachelor/Masters Degree in Electrical/Computer Engineering}

_{•Min 5 years experience in physical design with tapeouts}

_{•Knowledge of complete Netlist-to-GDS flow, including floor planning, power-grid synthesis, place opt. and routing, CTS, timing closure, signal integrity, STA, and physical verification}

_{•Knowledge of Synopsys/Cadence tools like ICC or Encounter}

_{•Expertise in low power design implementation or flow development}

_{•Expertise in hierarchical design implementation is a plus}

_{•Good in script programming with Perl, TCL/TK or other languages}

_{•Willing to relocate to Singapore}

_{请投简历到qianqian@uniconnect.com.sg，有任何问题可以打电话到：63251262。}